Page "Central processing unit" Paragraph 36
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This period must be longer than the amount of time it takes for a signal to move, or propagate, in the worst-case scenario.
In setting the clock period to a value well above the worst-case propagation delay, it is possible to design the entire CPU and the way it moves data around the " edges " of the rising and falling clock signal.
This has the advantage of simplifying the CPU significantly, both from a design perspective and a component-count perspective.
However, it also carries the disadvantage that the entire CPU must wait on its slowest elements, even though some portions of it are much faster.
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