Page "Orthogonal instruction set" Paragraph 15

In the RISC age, computer designers strove to achieve a balance that they thought better.

In particular, most RISC computers, while still being highly orthogonal with regard to which instructions can process which data types, now have reverted to " load / store " architectures.

In these architectures, only a very few memory reference instructions can access main memory and only for the purpose of loading data into registers or storing register data back into main memory ; only a few addressing modes may be available, and these modes may vary depending on whether the instruction refers to data or involves a transfer of control ( jump ).

Conversely, data must be in registers before it can be operated upon by the other instructions in the computer's instruction set.

This trade off is made explicitly to enable the use of much larger register sets, extended virtual addresses, and longer immediate data ( data stored directly within the computer instruction ).