Page "PDP-10" Paragraph 25

The instruction set is very symmetric.

Every instruction consists of a 9-bit opcode, a 4-bit register code, and a 23-bit effective address field, which consists in turn of a 1-bit indirect bit, a 4-bit register code, and an 18-bit offset.

Instruction execution begins by calculating the effective address.

It adds the contents of the given register ( if non-zero ) to the offset ; then, if the indirect bit is 1, fetches the word at the calculated address and repeats the effective address calculation until an effective address with a zero indirect bit is reached.

The resulting effective address can be used by the instruction either to fetch memory contents, or simply as a constant.

Thus, for example, MOVEI A, 3 ( C ) adds 3 to the 18 lower bits of register C and puts the result in register A, without touching memory.