The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit ( FPU ).

Versions of the 68040 were created for specific market segments, including the 68LC040, which removed the FPU, and the 68EC040, which removed both the FPU and MMU.

It differs from the 68040 in that it has neither an FPU nor an MMU.

The 68LC040 is a low cost version of the Motorola 68040 microprocessor with no FPU.

With the 68040, Motorola integrated the FPU and CPU, but like the x86 series, a lower cost 68LC040 without an integrated FPU was also available.

It was based on Motorola's 68040 microprocessor rather than the 68LC040 ( which lacked an on-board FPU ).

When the Motorola 68040 processor was introduced, it included the FPU internally.

This FPU was a huge step forward for AMD.

While the K6 FPU had looked anemic compared to the Intel P6 FPU, with Athlon this was no longer the case.

While the 6x86's integer performance was significantly higher than P5 Pentium's, it's floating point performance was more mediocre — between 2 and 4 times the performance of the 486 FPU per clock cycle ( depending on the operation and precision ).

The FPU in the 6x86 was largely the same circuitry that was developed for Cyrix's earlier high performance 8087 / 80287 / 80387-compatible coprocessors, which was very fast for its time — the Cyrix FPU was much faster than the 80387, and even the 80486 FPU.

* i487SX: i486DX with a slightly different pinout sold as an FPU upgrade to i486SX systems ; it was widely documented that an i487SX when installed completely disabled the existing i486SX on the motherboard, replacing it.

Intel's i486SX was a modified Intel 486DX microprocessor with its floating-point unit ( FPU ) disconnected.

If testing showed that the central processing unit was working but the FPU was defective, the FPU's power and bus connections were destroyed with a laser and the chip was sold cheaper as an SX ; if the FPU worked it was sold as a DX.

It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit ( MMU ), which was added in the 68030.

Odd-numbered releases had always been reactions to issues raised within the previous even numbered part ; hence, it was generally expected that the 68050 would have reduced the 68040's power consumption ( and thus heat dissipation ), improved exception handling in the FPU, used a smaller feature size and optimized the microcode in line with program use of instructions.

A given sequence of arithmetic operations may thus behave slightly differently compared to a strict single-precision or double-precision IEEE 754 FPU.

Even with a single memory pipeline and simpler FPU, the vastly improved integer performance, lower price, and higher density made the R10000 preferable for most customers.

The mapping of the MMX registers onto the existing FPU registers made it somewhat difficult to work with floating point and SIMD data in the same application.

DOS games usually made an FPU optional because the games either didn't use a significant amount of floating point arithmetic or just added some extra bonus features if the computer was equipped with one.

This machine was followed in 1991 by the Macintosh Classic II, which, despite the same processor and clock speed, was only 60 % as fast as the SE / 30 due to its 16-bit data path, supported no more than 10 MB of memory, lacked an internal expansion slot, and made the Motorola 68882 FPU an optional upgrade.

They also made the connection to earlier numerical experiments by Fermi, Pasta, and Ulam by showing that the KdV equation was the continuum limit of the FPU system.

* FPU lacks IEEE transcendental functions capability.

These were based on a set of custom chips, including a 32-bit ALU and a 64-bit IEEE 754 FPU with 128 kB of RAM combined onto a board known as a module.

** IEEE standard single and double precision Floating Point Unit ( FPU )

FPU ( x87 ) instructions provide higher precision by calculating intermediate results with 80 bits of precision, by default, to minimise roundoff error in numerically unstable algorithms ( see IEEE 754 design rationale and references therein ).

In the absence of an FPU, many FPU functions can be emulated, which saves the added hardware cost of an FPU but is significantly slower.

An 8088 processor without an 8087 could not interpret these instructions, requiring separate versions of programs for FPU and non-FPU systems, or at least a test at run time to detect the FPU and select appropriate mathematical library functions.

Unlike the i432, the 960 MX had fairly good performance, mostly as a side effect of dramatically reducing the complexity of the core instruction set, integration of all CPU functions on a single chip, and including an FPU.

The Intel P5 Pentium had two superscalar ALUs which could accept one instruction per clock each, but its FPU could not accept one instruction per clock.

The FPU upgrade device was shipped as the i487, which was a full blown i486DX chip with an extra pin.

One of these could be filled by the optional R2010 FPU, which had thirty-two 32-bit registers that could be used as sixteen 64-bit registers for double-precision.

This addition is the key element of the Fermi – Pasta – Ulam problem, which is often designated by the abbreviation FPU.

The purpose of CNLS is to continue the laboratory's tradition of work in nonlinear science, which began with FPU, but which also includes Mitchell Feigenbaum's important work in chaos and fractals ( 1975 ).

The first implementation of the 88000 ISA was the MC88100 microprocessor, which included an integrated FPU.

This was later addressed by the superscalar MC88110, which combined the CPU, FPU, MMU, and L1 cache into a single package.

IBM complemented this with a complex instruction decoder which could be fetching one instruction, decoding another, and sending one to the ALU and FPU at the same time, resulting in one of the first superscalar CPU designs in use.

* The Intel 486SX which was a 486DX with the FPU removed or in early versions present but disabled.

The last Cyrix-badged microprocessor was the Cyrix MII-433GP which ran at 300 MHz ( 100x3 ) and performed faster than an AMD K6 / 2-300 on FPU calculations ( as benched with Dr. Hardware ).

The second integer unit, which shares paths with the FPU, does not have these facilities and is limited to simple operations such as add, subtract, and the calculation of branch target addresses.

The use of the convention with these processors ( which are rated against AMD's earlier Thunderbird-based Athlon processors ) is less criticized, as the Athlon XP is a capable performer in both integer and FPU operations, and manages to outperform an Intel Pentium 4 at a PR equalling the Pentium 4's clock speed.