The 8051 microcontroller has two, a primary accumulator and a secondary accumulator, where the second is used by instructions only when multiplying ( MUL AB ) or dividing ( DIV AB ); the former splits the 16-bit result between the two 8-bit accumulators, whereas the latter stores the quotient on the primary accumulator A and the remainder in the secondary accumulator B.

* There are two additional 8-bit accumulators, E and F. These can be concatenated to form a 16-bit accumulator called W. The existing 6809 16-bit accumulator, D, can also be concatenated with W to form a 32-bit accumulator Q.

The processor had seven 8-bit registers, ( A, B, C, D, E, H, and L ) where A was the 8-bit accumulator and the other six could be used as either byte-registers or as three 16-bit register pairs ( BC, DE, HL ) depending on the particular instruction.

Most 8-bit operations could only be performed on the 8-bit accumulator ( the A register ).

*: 16-bit accumulator / address register or two 8-bit registers

The processor has seven 8-bit registers accessible to the programmer, named A, B, C, D, E, H, and L, where A is the 8-bit accumulator and the other six can be used as independent byte-registers or as three 16-bit register pairs, BC, DE, and HL, depending on the particular instruction.

Most 8-bit operations work on the 8-bit accumulator ( the A register ).

Where the 56K grouped two 24-bit data and one 8-bit extension register into a single 56-bit accumulator, the 96K groups three 32-bit registers into a 96-bit accumulator.

The SPC700 instruction set is quite similar to that of the 6502 CPU family, but includes additional instructions, including XCN ( eXChange Nibble ) which swaps the upper and lower 4-bit portions of the 8-bit accumulator, and an 8-by-8-to-16-bit multiply instruction.

Because of the 16-bit address bus, and the 8-bit data bus, the sixteen general purpose registers are 16 bits wide, but the accumulator ( the so-called data register, or D-register ) is only 8 bits wide.

The two addressing modes Indirect register, and Indirect register with auto-increment are then fairly efficient, to perform 8-bit operations on the data in the accumulator.

The CPU has an 8-bit accumulator and 15-bit PC.

Like the 68HC11, the 68HC12 has 2 8-bit accumulators A and B ( referred to as a single 16-bit accumulator, D, when A & B are cascaded so as to allow for operations involving 16 bits ), 2 16-bit registers X and Y, a 16-bit program counter, a 16-bit stack pointer and an 8 bit Condition Code Register ..

An assembly-language programmer or compiler writer had to be mindful of which operations were possible on each register: Most 8-bit operations could be performed only on the 8-bit accumulator ( the A-register ), while 16-bit operations could be performed only on the 16-bit pointer / accumulator ( the HL-register pair ), whereas simple operations, such as increment, were possible on all seven 8-bit registers.

Note 1: An 8-bit sequence is usually used as the flag sequence ; for example, the 8-bit flag sequence 01111110.

On computers and data links using 8-bit bytes this left the top bit of each Byte free for use as a parity, flag bit, or meta data control bit.

*** 8-bit DAC for each channel ( 4 channels × 8-bits / channel = 32 bits commonly quoted )

Single precision used 36 bits, organized into a 1-bit sign, an 8-bit exponent, and a 27-bit significand.

The new machine also had a larger address space than the older mainframes, 24 bits addressing 8-bit bytes vs. a typical 18 bits addressing 36-bit words.

Industry Standard Architecture ( ISA ) is a computer bus standard for IBM PC compatible computers introduced with the IBM Personal Computer to support its Intel 8088 microprocessor's 8-bit external data bus and extended to 16 bits for the IBM Personal Computer / AT's Intel 80286 processor.

This can be ambiguous as an 8-bit color LCD can be 8 total bits spread between red, green, and blue or 8 bits each for each color in a different display.

SysEx is poorly suited to this purpose, as MIDI words are limited to seven bits of information, so an 8-bit sample requires two bytes for transmission instead of one.

* High-end digital image equipment are often able to deal with larger integer ranges for each primary color, such as 0 .. 1023 ( 10 bits ), 0 .. 65535 ( 16 bits ) or even larger, by extending the 24-bits ( three 8-bit values ) to 32-bit, 48-bit, or 64-bit units ( more or less independent from the particular computer's word size ).

* The 8-bit byte ( against financial pressure during development to reduce the byte to 4 or 6 bits ), rather than adopting the 7030 concept of accessing bytes of variable size at arbitrary bit addresses.

The resolution of message parameters could be any multiple of 8-bit, potentially extending 7-bit resolution typical of MIDI to 32 or more bits.

These encodings are now achieved by using a higher-resolution linear ADC ( e. g. 12 or 16 bits ) and mapping its output to the 8-bit coded values.

These sub-components are typically 16 -, 32-or 64-bit words, 8-bit bytes, or even bits.

Eight-bit CPUs use an 8-bit data bus and can therefore access 8 bits of data in a single machine instruction.

CDC used the term " byte " to refer to 12-bit entities used by peripheral processors ; characters were 6-bit, and central processor instructions were either 15 bits, or 30 bits with a signed 18-bit address field, the latter allowing for a directly addressable memory space of 128K words of central memory ( converted to modern terms, with 8-bit bytes, this is 0. 94 MB ).

* 8-bit data bus – It can access 8 bits of data in one operation

The economic effect of the telephone system is large: It effectively forced character systems with more than 8-bits ( e. g. Unicode ) back into an 8-bit form ( e. g. UTF-8 ), and most commercially important computers for the last forty years have used internal word sizes that are multiples of 8 bits.

For example, if there are 16 bits per pixel, each pixel is represented in two consecutive ( contiguous ) 8-bit bytes in the framebuffer ( a. k. a. screen buffer ).

The popular Cirrus Logic graphics chips of the early 1990s made use of the spare high-order bit for their so-called " mixed " video modes: with bit 15 clear, bits 0 through 14 would be treated as an RGB value as described above, while with bit 15 set, bit 0 through 7 would be interpreted as an 8-bit index into a 256-color palette ( with bits 8 through 14 remaining unused.

Given this inherent distortion, it is not unusual for a television or video projector to truthfully claim a linear contrast ratio ( difference between darkest and brightest output levels ) of 1000: 1 or greater, equivalent to 10 bits of audio precision even though it may only accept signals with 8-bit precision and use an LCD panel that only represents 6 or 7 bits per channel.

In 2006, Atari 8-bit, Commodore PET, Macintosh computers, Channel F, Magnavox Odyssey, CD-i, Dragon 32 / 64, Magnavox Odyssey², iPod, PlayStation 3 and Wii were added to the database.

The nonlinear layer is composed of eight 8 × 8-bit S-boxes based on the function F ( x ) = x < sup >− 1 </ sup > over GF ( 2 < sup > 8 </ sup >).

Writing elements of ( F < sub > 2 </ sub >)< sup > 8 </ sup > as 8-bit integers in hexadecimal, the code H ( 8, 4 ) can by given explicitly as the set

Early 8-bit and 16-bit processors used software to carry out floating-point arithmetic operations.

To carry a typical phone call from a calling party to a called party, the analog audio signal is digitized at an 8 kHz sample rate with 8-bit resolution using a special type of nonlinear pulse code modulation known as G. 711.

Capcom would carry the same 8-bit graphics and sprites present in the original Mega Man for the next five games in the main series.

The first technique used to ensure a minimum density of marks was zero code suppression a form of bit stuffing, which set the least significant bit of each 8-bit byte transmitted to a 1.

They specifically mention the use of ASCII character set " transmitted as a 8-bit byte with the high-order bit cleared to zero " and some of these

In the distant past, 8-bit implementations of the ASCII code set the top bit to zero or used it as a parity bit in network data transmissions.

The 64-bit data block is considered as a series of eight 8-bit bytes, and if the ICB corresponding to a particular byte is zero, the left and right 4-bit halves ( nibbles ) are swapped.

Since each memory location within the zero page of a 16-bit address bus computer may be addressed by a single byte, it was faster, in 8-bit data bus machines, to access such a location rather than a non-zero page location.

In 8-bit CP / M, the zero page is used for communication between the running program and the operating system.