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Page "Joint Test Action Group" ¶ 2
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JTAG and was
Joint Test Action Group ( JTAG ) is the common name for what was later standardized as the IEEE 1149. 1 Standard Test Access Port and Boundary-Scan Architecture.
JTAG was an industry group formed in 1985 to develop a method to test populated circuit boards after manufacture.
Although JTAG's early applications targeted board level testing, the JTAG standard was designed to assist with device, board, and system testing, diagnosis, and fault isolation.
Operating using a six-wire interface and a personal computer, the JTAG interface was originally intended to provide a means to test and debug embedded hardware and software.
The Joint Test Action Group ( JTAG ) developed a specification for boundary scan testing that was standardized in 1990 as the IEEE Std.

JTAG and provide
JTAG tool vendors provide various types of stimulus and sophisticated algorithms, not only to detect the failing nets, but also to isolate the faults to specific nets, devices, and pins.
More recently the term also covers JTAG based hardware debuggers which provide equivalent access using on-chip debugging hardware with standard production chips.
Even though few consumer products provide an explicit JTAG port connector, the connections are often available on the printed circuit board as a remnant from development prototyping and / or production.
* Chip Vendors may provide the tools, usually requiring a JTAG adapter they supply.

JTAG and from
There are entire debugging architectures built up using JTAG, such as ARM CoreSight and Nexus ( plus vendor-specific ones that may not be documented except under NDA ) helping move JTAG-centric debugging environments away from early processor-specific designs.
For example, custom JTAG instructions can be provided to allow reading registers built from arbitrary sets of signals inside the FPGA, providing visibility for behaviors which are invisible to boundary scan operations.
* The i. MX31 processor, which is similar, although its " System JTAG " boundary scan TAP, which is very different from ICEpick, and it includes a TAP for its DMA engine instead of a DSP and imaging engine.
They are also decoupled from JTAG so they can be hosted over ARM's two-wire " SWD " interface instead of just the six-wire JTAG interface.
In the satellite TV world, JTAG is most often used to obtain read-write access to nonvolatile memory within a digital receiver ; initially programs such as Wall and JKeys were used to read box keys from receivers with embedded CAMs but JTAG has since proven its legitimate worth to satellite TV fans as a repair tool to fix receivers where the firmware ( in flash memory ) has been corrupted.
Four engineers — Aaron ( Shane Carruth ), Abe ( David Sullivan ), Robert, and Phillip — who work for a large corporation during the day, run a side business from Aaron's garage at night, building and selling JTAG cards.
Typically high-end commercial JTAG testing systems allow the import of design ' netlists ' from CAD / EDA systems plus the BSDL models of boundary scan / JTAG compliant devices to automatically generate test applications.
* BAE Systems RAD750 processor JTAG Emulator from corelis. com
* Wiggler ( JTAG ), a parallel port JTAG tool from the Macraigor Systems LLC.

JTAG and one
Boundary scan testing requires that all the ICs to be tested use a standard test configuration procedure, the most common one being the Joint Test Action Group ( JTAG ) standard.
The controller modules interface with the system " centerplane " via JTAG and control the partitioning of available CPUs, memory and I / O devices into one or more domains, each of which is in effect a distinct computer.
In JTAG, devices expose one or more test access ports ( TAPs ).

JTAG and IC
Today JTAG is also widely used for IC debug ports.
When combined with built-in self-test ( BIST ), the JTAG scan chain enables a low overhead, embedded solution to testing an IC for certain static faults ( shorts, opens, and logic errors ).

JTAG and another
Besides debugging, another application of JTAG is allowing device programmer hardware to transfer data into internal non-volatile device memory ( e. g. CPLDs ).

JTAG and so
A JTAG interface is a special four / five-pin interface added to a chip, designed so that multiple chips on a board can have their JTAG lines daisy-chained together if specific conditions are met, and a test probe need only connect to a single " JTAG port " to have access to all chips on a circuit board.
However, neither the IDE nor a debugger were included, so for debugging and JTAG access to the DSPs, users still need to purchase the complete toolchain.

JTAG and all
In the embedded processor market, essentially all modern processors implement JTAG when they have enough pins.
That same year Intel released the first processor with JTAG — the 80486 — which led to quicker industry adoption by all manufacturers.
There are generally some processor-specific JTAG operations which can reset all or part of the chip being debugged.
Those processors are both intended for use in wireless handsets such as cell phones, which is part of the reason they include TAP controllers which modify the JTAG scan chain: Debugging low power operation requires accessing chips when they are largely powered off, and thus when not all TAPs are operational.
* Except for some of the very lowest end systems, essentially all embedded systems platforms have a JTAG port to support in-circuit debugging and firmware programming as well as for boundary scan testing:
** Almost all FPGAs and CPLDs used today can be programmed via a JTAG port.
With all JTAG adapters, software support is a basic concern.

JTAG and these
Installing firmware into Flash, or SRAM in place of Flash, via JTAG is intermediate between these extremes, as well as in cost of hardware tools.

JTAG and faults
By using JTAG to manipulate the chip's external interface ( inputs and outputs to other chips ) it is possible to test for certain faults, caused mainly by manufacturing problems.

JTAG and be
EEPROM versions may be in-system programmable ( typically via JTAG ).
These pins can be configured to function as JTAG or GPIO depending on the setting of a fuse bit, which can be programmed via ISP or HVSP.
Once imported, the developer should be able to transfer the circuit via a Joint Test Action Group ( JTAG ) cable.
Debug support is, for many software developers, the main reason to be interested in JTAG.
In the case of FPGAs, volatile memory devices can also be programmed via the JTAG port normally during development work.
By using JTAG to manipulate its internal interface ( to on-chip registers ), the combinational logic can be tested.
Behind those registers is hardware that is not specified by JTAG, and which has its own states that will be affected by JTAG activities.
Halting it puts the core into the " Debug Mode ", where the ITR can be used to execute instructions, including using the DCC to transfer data between the debug ( JTAG ) host and the CPU.
Issuing a HALT instruction using JTAG might be dangerous.
A special JTAG card can be used to reflash a corrupt BIOS.
These cells can be programmed via the JTAG scan chain to drive a signal onto a pin and across an individual trace on the board.
A JTAG Test Access Port ( TAP ) can be turned into a low-speed logic analyzer.
The " D " represented a JTAG TAP for debugging ; the " I " denoted an ICEBreaker debug module supporting hardware breakpoints and watchpoints, and letting the system be stalled for debugging.

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