The first used the same graphics processor as the BBC Micro in mode 7 — the SAA5050 — but used software to ensure that it was fed with the correct graphics data.

AIX was the first operating system to utilize journaling file systems, and IBM has continuously enhanced the software with features like processor, disk and network virtualization, dynamic hardware resource allocation ( including fractional processor units ), and reliability engineering ported from its mainframe designs.

Finally a replacement for the aging Z80 processor was being developed in the form of an Intel 8086 board, and additional 512K 16 bit memory boards.

AbiWord had grammar checking before any other open source word processor, although a grammar checker was later added to OpenOffice. org.

Powering the system was an Atari SALLY 6502 ( Atari's slightly custom 6502, sometimes described as a " 6502C ") processor running at 1. 79 MHz, similar to the processor found in home computers ( Atari 8-bit, Apple II, Commodore 64 ) and other consoles ( Atari 5200 and Nintendo Entertainment System ).

The original Athlon ( now called Athlon Classic ) was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intel's competing processors for a significant period of time.

Athlon was the first x86 processor with a 128 kB split level 1 cache ; a 2-way associative, later 16-way, cache separated into 2 × 64 kB for data and instructions ( Harvard architecture ).

This high-speed SDRAM cache was run at a divisor of the processor clock and was accessed via its own 64-bit bus, known as a " back-side bus " allowing the processor to both service system front side bus requests ( the rest of the system ) and cache accesses simultaneously verses the traditional approach of pushing everything through the front-side bus.

Eventually a product called the " Goldfingers device " was created that could unlock the CPU, named after the gold connector pads on the processor board that it attached to.

The eventual joint company effort, named Borland Office for Windows ( a combination of the WordPerfect word processor, Quattro Pro spreadsheet and Paradox database ) was introduced at the 1993 Comdex computer show.

The system, which was called George, with an application programmed in JOVIAL, was intended to support some 4000 terminals, but even after a fourth processor was added it couldn't handle the workload.

The first ( retroactively ) RISC-labeled processor ( IBM 801-IBMs Watson Research Center, mid-1970s ) was a tightly pipelined simple machine originally intended to be used as an internal microcode kernel, or engine, in CISC designs, but also became the processor that introduced the RISC idea to a somewhat larger public.

Reasons for this transition was productive uses for such monitors, i. e. besides widescreen computer game play and movie viewing, are the word processor display of two standard letter pages side by side, as well as CAD displays of large-size drawings and CAD application menus at the same time.

This was a version of Windows 2. 1 adapted for the 80386 processor.

DEC's last major attempt to find a space in the rapidly changing market was the DEC Alpha 64-bit RISC processor architecture.

Although the Alpha processor family met both of these goals, and, for most of its lifetime, was the fastest processor family on the market, it did little to affect the bottom line or repair the company's status.

Data General also produced a series of single-chip implementations of the Nova processor as the microNOVA.

A single-chip processor, the J-11 was developed in 1979.

To address technical workstation, supercomputer, and engineering / scientific markets, IBM Austin ( the home of the RS / 6000s ) then started developing a time-to-market single-chip version of the Power2 ( P2SC ) in parallel with the development of a sophisticated 64-bit PowerPC processor with the POWER2 extensions and twin sophisticated MAF floating point units ( the POWER3 / 630 ).

To address RS / 6000 commercial applications and AS / 400 systems, IBM Rochester ( the home of the AS / 400s ) started developing the first of the high-end 64-bit PowerPC processors with AS / 400 extensions, and IBM Endicott started developing a low-end single-chip PowerPC processor with AS / 400 extensions.

For the second series the naming was changed, and they created the single-chip nCUBE 2 processor.

It was marketed as " the world's first ' GPU ', or Graphics Processing Unit ," a term Nvidia defined at the time as " a single-chip processor with integrated transform, lighting, triangle setup / clipping, and rendering engines that is capable of processing a minimum of 10 million polygons per second.

The processor was also used in several single-chip floppy disk drive controller chips, notably the FD1771.

The GeForce was a single-chip processor with integrated transform, lighting, triangle setup / clipping ( hardware T & L ), and rendering engines, giving it a significant performance advantage over the Voodoo3.

It was a single-chip processor running at 50-77 MHz.

Its original design called for a single-chip 8-bit microprocessor for the CPU, rather than a conventional processor built from discrete TTL modules.

The term GPU was popularized by Nvidia in 1999, who marketed the GeForce 256 as " the world's first ' GPU ', or Graphics Processing Unit, a single-chip processor with integrated transform, lighting, triangle setup / clipping, and rendering engines that are capable of processing a minimum of 10 million polygons per second ".

The VT78 added to the VT52 a single-chip PDP-8 processor, on which was programmed WPS-8, Digital's word processing system.

Both simple pipelining and superscalar design increase a CPU's ILP by allowing a single processor to complete execution of instructions at rates surpassing one instruction per cycle ( IPC ).

Late designs in several processor families exhibit CMP, including the x86-64 Opteron and Athlon 64 X2, the SPARC UltraSPARC T1, IBM POWER4 and POWER5, as well as several video game console CPUs like the Xbox 360's triple-core PowerPC design, and the PS3's 7-core Cell microprocessor.

Such computers are more versatile in that they do not need to have their hardware reconfigured for each new program, but can simply be reprogrammed with new in-memory instructions ; they also tend to be simpler to design, in that a relatively simple processor may keep state between successive computations to build up complex procedural results.

( Again, the line blurs with high-end calculators, which use processor chips associated with computer and embedded systems design, particularly the Z80, MC68000, and ARM architectures, as well as some custom designs specifically made for the calculator market.

This design became the basis of the commercial SPARC processor design.

Various modern compiler static code analysis techniques ( such as elimination of dead code: for example, code which uses the processor but produces internal results which are not used or output ) make the use and design of synthetic benchmarks more difficult.

The goal of this approach is twofold: to enable deeper inspection of the code at compile time to identify additional opportunities for parallel execution, and to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.

Many of the techniques of CPU and OS design that improve interrupt latency will decrease throughput and increase processor utilization.

Despite the name implying a design evolving from the K5, it is in fact a totally different design that was created by the NexGen team, including chief processor architect Greg Favor, and adapted after the AMD purchase.

However, this put the small company in the difficult position of doing both processor design and system design.

Modern microcode is normally written by an engineer during the processor design phase and stored in a ROM ( read-only memory ) or PLA ( programmable logic array ) structure,

Unlike machine code which often retains some compatibility among different processors in a family, microcode only runs on the exact electronic circuitry for which it is designed, as it constitutes an inherent part of the particular processor design itself.

The MACSS team drew heavily on the influence of minicomputer processor design, such as the PDP-11 and VAX systems, which were similarly microcoded.

However, the decisions made by the design team made for a very powerful processor and made possible advanced operating systems like OS-9 and UniFlex, which took advantage of the position-independent, re-entrant nature of the 6809 to create multi-user multitasking operating systems.

NeXT's long-term aim was to migrate to the RISC ( Reduced Instruction Set Computing ) architecture, a processor design strategy intended to increase performance.

Intel at first planned to demonstrate the P5 in June 1992 at the trade show PC Expo, and to formally announce the processor in September 1992, but design problems forced the demo to be cancelled, and the official introduction of the chip was delayed until the spring of 1993.

Similarly to a classical bit where the state of a transistor in a processor, the magnetization of a surface in a hard disk and the presence of current in a cable can all be used to represent bits in the same computer, an eventual quantum computer is likely to use various combinations of qubits in its design.

This simplified many aspects of processor design: allowing instructions to be fixed-length, simplifying pipelines, and isolating the logic for dealing with the delay in completing a memory access ( cache miss, etc.

This property makes the NAND gate crucial to modern digital electronics, including its use in NAND flash memory and computer processor design.

As VLB fundamentally tied a card directly to the 486 processor bus with minimal intermediary logic ( reducing logic design and component costs ), timing and arbitration duties were strongly dependent on the cards and CPU.

When the Pentium processor arrived there were major differences in its bus design, and was not easily adaptable to a VESA Local Bus implementation.