Page "Motorola 68060" Paragraph 4

Against the Pentium, the 68060 could perform better on mixed code, Pentium's decoder could not issue an FP instruction every opportunity and hence the FPU was not superscalar as the ALUs were.

If the 68060's non-pipelined FPU could accept an instruction, it could be issued one by the decoder.

This meant that optimizing for the 68060 was easier, no rules prevented FP instructions from being issued whenever was convenient for the programmer other than well understood instruction latencies.

However, with properly optimized and scheduled code, the Pentium's FPU was capable of double the clock for clock throughput of the 68060's FPU.