Page "Transistor" Paragraph 70

In a FET, the drain-to-source current flows via a conducting channel that connects the source region to the drain region.

The conductivity is varied by the electric field that is produced when a voltage is applied between the gate and source terminals ; hence the current flowing between the drain and source is controlled by the voltage applied between the gate and source.

As the gate – source voltage ( V < sub > gs </ sub >) is increased, the drain – source current ( I < sub > ds </ sub >) increases exponentially for V < sub > gs </ sub > below threshold, and then at a roughly quadratic rate () ( where V < sub > T </ sub > is the threshold voltage at which drain current begins ) in the " space-charge-limited " region above threshold.

A quadratic behavior is not observed in modern devices, for example, at the 65 nm technology node.