Some architectures use a particular register as an accumulator in some instructions, but other instructions use register numbers for explicit operand specification.

Some systems using these older architectures are still in use today in data centers with high data volume needs, or where existing systems are so complex and abstract it would be cost-prohibitive to migrate to systems employing the relational model ; also of note are newer object-oriented databases.

Some systems ( particularly older, microcode-based architectures ) can also perform various transcendental functions such as exponential or trigonometric calculations, though in most modern processors these are done with software library routines.

Some designs also contain multiple architectures and configurations.

Some parallel computer architectures use smaller, lightweight versions of threads known as fibers, while others use bigger versions known as processes.

Some of the available SQL database firewalls provide / support honeypot architectures to let the intruder run against a trap database while the web application still runs as usual.

Some of the most popular architectures for cognitive modeling include ACT-R and Soar.

Some architectures reflects a Mudéjar style, while others reflect the cultural influence of the Netherlands through the colony of Curacao.

Some processor architectures, such as the Motorola 68000, Motorola 6809, WDC 65C816, Knuth's MMIX, ARM and x86-64 allow referencing data by offset from the program counter.

Some modern debug architectures, like ARM CoreSight and Nexus, provide internal and external bus master access without needing to halt and take over a CPU.

Some critics regard SOA as merely an obvious evolution of well-deployed architectures ( open interfaces, etc.

Some architectures provide multiple barriers for enforcing different ordering constraints.

Some architectures, including the ubiquitous x86 / x64, provide several memory barrier instructions including an instruction sometimes called " full fence ".

Some architectures provide separate memory barriers to control ordering between different combinations of system memory and I / O memory.

Some computer architectures ( such as ARM ) have conditional instructions ( or conditional loads, such as x86 ) which can in some cases obviate the need for conditional branches and avoid flushing the instruction pipeline.

Some current computer architectures ( e. g. IBM / 390 and Intel Pentium ) contain some instructions with implicit operands in order to maintain backwards compatibility with earlier designs.

Some architectures, like the non-hardware-assisted x86, do not meet these conditions, so they cannot be virtualized in the classic way.

Some computer architectures still reserve the beginning of address space for other purposes, though ; for instance, Intel x86 systems reserve the first 512 words of address space for the interrupt table if they run in real mode.

Some architectures include other stages such as memory access.

Some labels used to denote classes of CPU architectures are not particularly descriptive, especially so the CISC label ; many early designs retroactively denoted " CISC " are in fact significantly simpler than modern RISC processors ( in several respects ).

Some cognitive architectures or models are based on a set of generic rules, as, e. g., the Information Processing Language ( e. g., Soar based on the unified theory of cognition, or similarly ACT-R ).

Some architectures like MIPS have special unaligned load and store instructions.

Some software providers also produced compilers for BASIC, and other languages, to produce binary ( or " machine ") code which would run many times faster and make better use of the small system RAM.

Some compilers, such as gcc, add extra keywords for a programmer to explicitly mark external functions as pure, to enable such optimizations.

Some Forth implementations ( usually early versions or those written to be extremely portable ) compile threaded code, but many implementations today generate optimized machine code like other language compilers.

Some aspects attributed to the first RISC-labeled designs around 1975 include the observations that the memory-restricted compilers of the time were often unable to take advantage of features intended to facilitate manual assembly coding, and that complex addressing modes take many cycles to perform due to the required additional memory accesses.

Some Forth compilers compile Forth programs into direct-threaded code, while others make indirect-threaded code.

Some Forth compilers produce token threaded code.

Some programmers consider the " p-code " generated by some Pascal compilers, as well as the bytecodes used by. NET, Java, BASIC and some C compilers to be token-threading.

Some compilers in this category provide special constructs or extensions to allow programmers to directly specify operations to be performed in parallel ( e. g., DO FOR ALL statements in the version of FORTRAN used on the ILLIAC IV, which was a SIMD multiprocessing supercomputer ).

Some systems, called dynamic translators, or " just-in-time " ( JIT ) compilers, translate bytecode into machine language as necessary at runtime: this makes the virtual machine unportable, but doesn't lose the portability of the bytecode itself.

:; Machine code generation: Some compilers compile source code directly into machine code.

Some, but not all, optimizations can nowadays be performed by optimizing compilers. is often easier to optimize at this stage, and profiling may reveal unexpected performance problems that would not have been addressed by premature optimization.

Some compilers support an option to turn recognition of trigraphs off, or disable trigraphs by default and require an option to turn them on.

Some languages allow, some require, compilers to provide coercion.

Some compilers and lint-like tools flag occurrences of singleton variables.

Some languages and compilers may provide sufficient facilities to implement functions which address both the compiler reordering and machine reordering issues.

Some efficiency-minded compilers employ a hybrid approach in which the activation records for a function are allocated from the stack if the compiler is able to deduce, through static program analysis, that the function creates no upwards funargs.

Some older compilers allow one only to specialize either all or none of the template's parameters.

Some historians believe that he was one of the compilers of the Chronicles of Nikon.

Some historical computers, such as the Burroughs large systems, had special " display registers " to support nested functions while compilers for most modern machines ( such as the ubiquitous x86 ) simply reserve a few words on the stack for the pointers, as needed.

Some early C compilers had the feature, now seen as an annoyance, of generating a warning on any function call that did not use the function's returned value.

Some compilers require that the letters of the joey word not be consecutive within the kangaroo word, or that the kangaroo and joey words must be etymologically unrelated.