Fully half of MIPS ' income today comes from licensing their designs, while much of the rest comes from contract design work on cores that will then be produced by third parties.

Success followed success, and today the MIPS cores are one of the most-used " heavyweight " cores in the marketplace for computer-like devices ( hand-held computers, set-top boxes, etc.

Both of these companies designed their cores in-house, just licensing the architecture instead of purchasing cores from MIPS.

MIPS cores can be found in newer Cisco, Linksys and Mikrotik's routerboard routers, cable modems and ADSL modems, smartcards, laser printer engines, set-top boxes, robots, handheld computers, Sony PlayStation 2 and Sony PlayStation Portable.

MIPS provides processor architectures and cores for digital home, networking and mobile applications.

MIPS Technologies ’ processor architectures and cores are used in home entertainment, networking and communications products.

MIPS customers license the architecture to develop their own processors or license off-the-shelf cores from MIPS that are based on the architecture.

Cavium has used up to 16 MIPS cores for its OCTEON family network reference designs.

Other licensees include Broadcom, which has developed MIPS-based CPUs for over a decade, Microchip Technology, which leverages MIPS processors for its 32-bit PIC32 microcontrollers, and Mobileye, whose EyeQ2 and EyeQ3 are based on cores licensed from MIPS.

Their Storm-1 processor ( 2007 ) contains 80 SIMD cores controlled by a MIPS CPU.

Designers use 8051 silicon IP cores, because of the smaller size, and lower power, compared to 32 bit processors like ARM M series, MIPS and BA22.

The design of the later, faster MIPS cores was primarily funded by Silicon Graphics Inc.

RMI, a Cupertino-based startup, is the first MIPS vendor to provide a processor SOC based on 8 cores, each of which runs 4 threads.

* Multi-core MIPS architecture-based device with integrated physics acceleration hardware and memory subsystem with " tons of cores "

In August 2011, Loongson Technology Corp. Ltd. licensed the MIPS32 and MIPS64 architectures from MIPS Technologies, Inc. for continued development of MIPS-based Loongson CPU cores.

Today, the most widely licensed IP cores are from Synopsys, MIPS Technologies and ARM Holdings.

The Propeller runs at 80 MHz and uses eight processor cores, called COGs, to reach a performance of 160 MIPS.

The MIPS design uses 6 bits of the 32-bit word for the basic opcode ; the rest may contain a single 26-bit jump address or it may have up to four 5-bit fields specifying up to three registers plus a shift value combined with another 6-bits of opcode ; another format, among several, specifies two registers combined with a 16-bit immediate value, etc.

Two companies have emerged that specialize in building multi-core devices using the MIPS architecture.

Among the manufacturers which have made computer workstation systems using MIPS processors are SGI, MIPS Computer Systems, Inc., Whitechapel Workstations, Olivetti, Siemens-Nixdorf, Acer, Digital Equipment Corporation, NEC, and DeskStation.

The former was to have been the first MIPS V implementation, and was due to be introduced in 1999.

MIPS Technologies would focus entirely on the embedded market, where it was having some success, and SGI would no longer have to fund development of a CPU that, since the failure of ARC, found use only in their own machines.

If the machine in question is larger than that, we can scale to 1600 MIPS with our quad Nehalem based package, and we have been promised an 8 way Nehalem EX based machine early next year that should take us to the 3200 MIPS mark.

Hercules generally outperforms IBM's PC based mainframes from the mid-1990s, which have an advertised peak performance of around 29 MIPS.

For comparison, current high-end IBM zEnterprise 196 systems can deliver over 52, 000 MIPS per machine, and they have considerable I / O performance advantages.

There have been various re-implementations of the original binary L4 kernel interface ( ABI ) and its higher level successors, including L4Ka :: Pistachio ( Uni Karlsruhe ), L4 / MIPS ( UNSW ) and Fiasco ( TU Dresden ).

The combination of a compact 16-bit instruction encoding with a more powerful 32-bit instruction encoding is not unique to SH-5 ; ARM processors have a 16-bit Thumb mode, and MIPS processors have a MIPS-16 mode.

Most high performance 32-bit and 64-bit processors ( some notable exceptions are most ARM and 32-bit MIPS CPUs ) have integrated floating point hardware, which is often, but not always, based on 64-bit units of data.

The second capability, by itself, is less noteworthy, as major RISC architectures ( such as SPARC, Alpha, PA-RISC, PowerPC, MIPS ) have been 64-bit for many years.

But all new microprocessor chips seemed to have bugs in this area, and required months of shared work between MIPS and Tandem to eliminate or work around the final subtle bugs.

MIPS, PA-RISC, ETRAX CRIS, SuperH, and SPARC are RISC architectures that each have a single branch delay slot ; PowerPC, ARM, and the more recently designed Alpha do not have any.

On-board control and data collection would have been maintained by a 1. 5 MIPS RISC-based computer system capable of processing data at 5 Mbit / s.

All MIPS, SPARC, and DLX instructions have at most two register inputs.

In general MIPS programs were forced to have a lot of wasteful NOP instructions, a behaviour that was an unintended consequence.

More recently, various free operating systems such as NetBSD and Linux / MIPS have been ported to the MIPS-based DECstations, extending their useful life by providing a modern operating system.

The MIPS architecture specifies a software-managed TLB ; the SPARC V9 architecture allows an implementation of SPARC V9 to have no MMU, an MMU with a software-managed TLB, or an MMU with a hardware-managed TLB., and the UltraSPARC architecture specifies a software-managed TLB.

As Nachos has not been in active development for a number of years, and possesses a number of recognized flaws ( particularly with regards to portability: Nachos relies on MIPS assembly code, and requires porting to run on x86 architecture ), successor projects have been initiated.

In recent years most of the technology used in the various MIPS generations has been offered as IP-cores ( building-blocks ) for embedded processor designs.

In cellphone / PDA applications, MIPS has been largely unable to displace the incumbent, competing ARM architecture.

OS-9000 has also been ported to the PowerPC, MIPS, some versions of Advanced RISC Machines ' ARM processor, and some of the Hitachi SH family of processors.

HyperTransport has also been used by IBM and Apple for the Power Mac G5 machines, as well as a number of modern MIPS systems.

While LGA sockets have been in use as early as 1996 by the MIPS R10000 and HP PA-8000 processors, the interface did not gain widespread use until Intel introduced their LGA platform, starting with the 5x0 and 6x0 sequence Pentium 4 ( Prescott ) in 2004.

There were other potential conflicts: earlier that year, MIPS had been purchased by SGI, which may have also contributed to concerns about the neutrality of the target platform.

Linux has been ported to a variety of CPUs not primarily used as the processor of a desktop or server computer, including ARM, AVR32, ETRAX CRIS, FR-V, H8300, IP7000, m68k, MIPS, mn10300, SuperH, and Xtensa processors, as an alternative to using a proprietary operating system and toolchain.

In addition to these proprietary operating systems, both Linux and NetBSD have been ported to the Jazz-based MIPS Magnum machines.

Although support is lacking from Linux / MIPS for the RISCstation series, they are supported by NetBSD as NetBSD / arc and had been supported by OpenBSD, prior to the termination of the port in 1998.

Smart cameras have been marketed since the mid 80s, but only in recent years have they reached widespread use, once technology allowed their size to be reduced while their processing power has reached several thousand MIPS ( devices with 1 GHz processors and up to 8000MIPS are available as of end of 2006 ).

It has been ported to many hardware platforms, including the DEC PDP-11 and VAX systems, Sun-2 and Sun-3 workstations, Intel x86, PowerPC G3 and MIPS.

He continues to work on quality management in Debian, and has also been working on the ARM and MIPS ports.

Lexra did not implement those instructions because they are not necessary for good performance in modern software and Silicon Graphics owned a patent that had originally been granted to MIPS Computer Systems Inc. for implementing unaligned loads and stores in a RISC processor and Lexra did not wish to pay a high license fee for permission to use the patent.