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The 16-bit PDP-11 instruction set has been very influential, with processors ranging from the Motorola 68000 to the Renesas H8 and Texas Instruments MSP430, inspired by its highly orthogonal, general-register oriented instruction set and rich addressing modes.
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16-bit and PDP-11
The PDP-11 16-bit computer was designed in a crash program by Harold McFarland, Gordon Bell, Roger Cady, and others.
It is reported that Edson de Castro, who had been a key member of the design team, left to form Data General when his design for a 16-bit successor to the PDP-8 was rejected in favour of the PDP-11 ; the " PDP-X " did not resemble the Data General Nova, although that is a common myth.
; PDP-11: The archetypal minicomputer ; a 16-bit machine and another commercial success for DEC. ( Also the LSI-11, primarily for embedded systems ).
The PDP-11 was a series of 16-bit minicomputers sold by Digital Equipment Corporation ( DEC ) from 1970 into the 1990s, one of a succession of products in the PDP series.
DEC's 32-bit successor to the PDP-11, the VAX ( for " Virtual Address eXtension ") overcame the 16-bit limitation, but was initially a superminicomputer aimed at the high-end time-sharing market.
The mass-production of those chips eliminated any cost advantage for the 16-bit PDP-11.
* Preserving the PDP-11 Series of 16-bit minicomputers
Other than that, Digital Equipment Corporation created several operating systems for its 16-bit PDP-11 class machines, including the simple RT-11 system, the time-sharing RSTS operating systems, and the RSX-11 family of real-time operating systems, and the VMS system for the 32-bit VAX computer.
*" My first operating system project was to build a real-time system called RSX-11M that ran on Digital's PDP-11 16-bit series of minicomputers.
Microsoft Xenix originally ran on the PDP-11 ; the first port was for the Zilog Z8001 16-bit processor.
The IBM Series / 1 computer is a 16-bit minicomputer, introduced in 1976, that in many respects competed with other minicomputers of the time, such as the PDP-11 from Digital Equipment Corporation and similar offerings from Data General and HP.
The basic architecture of the H8 is patterned after the DEC PDP-11, with eight 16-bit registers ( the H8 / 300H and H8S have an additional bank of eight 16-bit registers ), and a variety of addressing modes.
RSTS ( pronounced as " RIST-ess " or " RIST-uhs ") is a multi-user time-sharing operating system, developed by Digital Equipment Corporation (" DEC "), ( now part of Hewlett Packard ) for the PDP-11 series of 16-bit minicomputers.
* All constants are full word for the machine being used, e. g. on a 16-bit machine such as the PDP-11, a constant is 16 bits ; on a VAX computer, constants are 32 bits, and on a PDP-10, a constant is 36 bits.
The IBM 1130 used System / 360 electronics packaging called Solid Logic Technology ( SLT ) and had a 16-bit binary architecture, as did later minicomputers like the PDP-11 and Data General Nova.
BASIC-PLUS was an extended dialect of the BASIC programming language developed by Digital Equipment Corporation ( DEC ) for use on its RSTS / E time-sharing operating system for the PDP-11 series of 16-bit minicomputers in the early 1970s through the 1980s.
The H11, a low-end DEC PDP-11 16-bit computer, was less successful ; probably because it was substantially more expensive than the 8-bit computer line.
At that time, Whitesmiths published 16-bit compilers for machines like PDP-11 while COSMIC published 8-bit compilers for Intel and Motorola CPUs.
The PDP-11 / 73 ( strictly speaking, the MicroPDP-11 / 73 ) was the third generation of the PDP-11 series of 16-bit minicomputers produced by Digital Equipment Corporation to use LSI processors.
RADIX-50's 40-character repertoire ( 050 in octal ) can encode 6 characters plus 4 additional bits into one 36-bit word ( PDP-6, PDP-10 / DECsystem-10, DECSYSTEM-20 ); 3 characters plus 2 additional bits into one 18-bit word ( PDP-9, PDP-15 ); or 3 characters in one 16-bit word ( PDP-11, VAX ).
16-bit and instruction
It used the same basic instruction set as the 8008 ( developed by Computer Terminal Corporation ) and was source code compatible with its predecessor, but added some handy 16-bit operations to the instruction set as well.
The processor had seven 8-bit registers, ( A, B, C, D, E, H, and L ) where A was the 8-bit accumulator and the other six could be used as either byte-registers or as three 16-bit register pairs ( BC, DE, HL ) depending on the particular instruction.
By adding HL to itself, it was possible to achieve the same result as a 16-bit arithmetical left shift with one instruction.
It had an extended instruction set that was source-( not binary -) compatible with the 8008 and also included some 16-bit instructions to make programming easier.
:* The B700 " microprocessor " executed application-level opcodes using sequences of 16-bit microinstructions stored in main memory, each of these was either a register-load operation or mapped to a single 56-bit " nanocode " instruction stored in read-only memory.
Other features were one of the first hardware-implementations of a multiplication instruction in an MPU, full 16-bit arithmetic, and an especially fast interrupt system.
* The MOVE instruction writes a 16-bit value into one of the chipset's hardware registers.
The cheapest model was the S / 360-20 with as little as 4 K of core memory, eight 16-bit registers instead of the sixteen 32-bit registers of real 360s, and an instruction set that was a subset of that used by the rest of the range.
However, one of the main concepts of the MMX instruction set is the concept of packed data types, which means instead of using the whole register for a single 64-bit integer ( quadword ), one may use it to contain two 32-bit integers ( doubleword ), four 16-bit integers ( word ) or eight 8-bit integers ( byte ).
The original 32016 had a 16-bit external databus, a 24-bit external address bus, and a full 32-bit instruction set.
Finally, the system also included a 64-bit real-time clock register and four 64-bit instruction buffers that held sixty-four 16-bit instructions each.
Due to the large number of bits needed to encode the three registers of a 3-operand instruction, RISC processors using 16-bit instructions are invariably 2-operand machines, such as the Atmel AVR, the TI MSP430, and some versions of the ARM Thumb.
On the RCA 1802 series of microprocessors, the SEX, for "," instruction is used to designate which of the machine's sixteen 16-bit registers is to be the X ( index ) register.
The main usage of the MMX instruction set is based on the concept of packed data types, which means that instead of using the whole register for a single 64-bit integer, two 32-bit integers, four 16-bit integers, or eight 8-bit integers may be processed concurrently.
It provides arithmetic and logic operations on 64-bit integer numbers ( the software may choose to instead perform two 32-bit, four 16-bit or eight 8-bit operations in a single instruction ).
The processor has seven 8-bit registers accessible to the programmer, named A, B, C, D, E, H, and L, where A is the 8-bit accumulator and the other six can be used as independent byte-registers or as three 16-bit register pairs, BC, DE, and HL, depending on the particular instruction.
Adding HL to itself performs a 16-bit arithmetical left shift with one instruction.
Although the MCUs are 8-bit, each instruction takes one or two 16-bit words.
The combination of a compact 16-bit instruction encoding with a more powerful 32-bit instruction encoding is not unique to SH-5 ; ARM processors have a 16-bit Thumb mode, and MIPS processors have a MIPS-16 mode.
16-bit and set
Several team members decamped and set up Data General in May 1968, and rapidly brought the 16-bit NOVA minicomputer to market.
The 16-bit fixed width encodings, such as those from Unicode up to and including version 2. 0, are now deprecated due to the requirement to encode more characters than a 16-bit encoding can accommodate — Unicode 5. 0 has some 70, 000 Han characters — and the requirement by the Chinese government that software in China support the GB18030 character set.
This 16-bit requirement was later abandoned, making the size of the character set less an issue today.
Features that set CinePaint apart from its photo-editing predecessor include the frame manager, onion skinning, and the ability to work with 16-bit and floating point pixels for high dynamic range imaging ( HDR ).
The ARM's 16-bit Thumb instruction set has no branch predication, in order to save encoding space, but its successor Thumb-2 overcomes this problem using a special instruction which has no effect other than to supply predicates for the next four instructions.
Unfortunately, visible registers remained 16-bit, and this unplanned addition to the instruction set required executing many instructions per memory reference compared to most 32-bit minicomputers.
MIL-STD-1750A or 1750A is the formal definition of a 16-bit computer instruction set architecture ( ISA ), including both required and optional components, as described by the military standard document MIL-STD-1750A ( 1980 ).
AMD's method of extending Intel's 32-bit x86 instruction set to be a subset of its x86-64 instruction set is the same technique Intel employed to extend its 16-bit x86 instruction set to 32 bits.
The 8008's seminal importance lies in its becoming the ancestor of Intel's other 8-bit CPUs, which were followed by their assembly language compatible 16-bit CPU's — the first members of the x86-family, as the instruction set was later to be known.
Another change was the addition of an optional 16-bit data bus, which doubled the rate at which it could access memory if set up properly.
The register set consisted of sixteen 16-bit registers, and there were instructions that could use them as 8-bit, 16-bit, 32-bit, and 64-bit registers.
Android's Dalvik virtual machine for Java uses a virtual-register 16-bit instruction set instead of Java's usual 8-bit stack code, to minimize instruction count and opcode dispatch stalls.
0.192 seconds.