[permalink] [id link]
CPU expansion boards may provide additional custom buses.
from
Wikipedia
Some Related Sentences
CPU and expansion
The CPU bus provides addressing to other subsystems, such as conventional RAM, ROM and the Zorro II or Zorro III expansion subsystems.
Most Amiga models can be upgraded either by direct CPU replacement or through expansion boards.
Many expansion boards were produced for Amiga computers to improve the performance and capability of the hardware, such as memory expansions, SCSI controllers, CPU boards, and graphics boards.
Such replacements of CPU and memory system components were possible because the Aster CT-80 was designed to use a backplane that was designed to support both 8 and 16 bit processors, and used a modular Eurocard based design with slots to spare for expansion.
In these cases, expansion buses are entirely separate and no longer share any architecture with their host CPU ( and may in fact support many different CPUs, as is the case with PCI ).
Gone, for example, was the full 64K of RAM and the secondary 6502 CPU ; instead, the ECS offered a mere 2K RAM expansion, a built-in BASIC that was marginally functional, plus a much-simplified cassette and thermal-printer interface.
* Power connectors, which receive electrical power from the computer power supply and distribute it to the CPU, chipset, main memory, and expansion cards.
Compaq ) and then the VESA Local Bus Standard, were late 1980s expansion buses that were tied but not exclusive to the 80386 and 80486 CPU bus.
Generally PCI expansion cards will function on any CPU platform if there is a software driver for that type.
In computer science, a local bus is a computer bus that connects directly, or almost directly, from the CPU to one or more slots on the expansion bus.
The significance of direct connection to the CPU is avoiding the bottleneck created by the expansion bus, thus providing fast throughput.
Video hardware can be integrated into the motherboard or ( as with more recent designs ) the CPU, but all modern motherboards ( and some from the 1990s ) provide expansion ports to which a video card can be attached.
Note that in early S-100 systems, the S-100 bus is not just for expansion ; it is a passive backplane that also ties together the essential parts of the system including CPU and memory.
Sharing the same compact case design with three expansion slots, the IIci improved upon the IIcx's 16 MHz Motorola 68030 CPU and 68882 FPU, replacing them with 25 MHz versions of these chips.
To overcome these weakness a number of design objectives were created ; Harness the full potential of the StrongARM CPU, support multiple processors, add support for PCI expansion, offer the best possible graphics, run existing RISC OS applications and to provide enhanced RISC OS functionality.
The first product, the Sun-1, included the Stanford CPU board design with improved memory expansion, and a sheet-metal case.
* SuperCPU: CPU upgrade boxes to plug into the expansion port of the C64 / 128 ; with a 16-bit WDC 65816 CPU @ ~ 20 MHz
Around 1997, with the introduction of ATAPI-4 ( and thus the Ultra-DMA-Mode 0, which enabled fast data-transfers with less CPU utilization ) the first ATA RAID controllers were introduced as PCI expansion cards.
For example, the Northbridge and Southbridge chips are located near each other and to the hardware they control like CPU, RAM and expansion ports ( PS / 2, USB, LPT, etc.
Although the memory expansion interface connected directly to the CPU bus and could have been used for many applications, the edge connector involved had an unusual number of pins and was difficult to obtain.
It was superseded in 1987 by the PC-1360, which featured one additional RAM expansion port, improved BASIC, floppy disk capability, and a faster CPU.
This was Apple's first attempt at a " low-cost " Mac, and it was such a success that, when subsequent models replaced the CPU with a 68030, a 68040, and later a PowerPC processor, ways were found to keep the PDS slot compatible with the original LC, so that the same expansion cards would continue to work.
The passive backplanes of early models were replaced with the standard of putting the CPU on a motherboard, with only optional expansion boards in system bus slots.
CPU and boards
Phase5 designed the PowerUP boards ( Blizzard PPC and CyberStorm PPC ) featuring both a 68k ( a 68040 or 68060 ) and a PowerPC ( 603 or 604 ) CPU, which are able to run the two CPUs at the same time ( and share the system memory ).
The PowerPC CPU on PowerUP boards is usually used as a coprocessor for heavy computations ( a powerful CPU is needed to run MAME for example, but even decoding JPEG pictures and MP3 audio was considered heavy computation at the time ).
It is also possible to ignore the 68k CPU and run Linux on the PPC ( project Linux APUS ), but a PowerPC native AmigaOS promised by Amiga Technologies GmbH was not available when the PowerUP boards first appeared.
In keeping with the original concept, the Nova was based on two printed circuit boards, one for the CPU and another for various support systems.
While the SuperNOVA used three 15 × 15 " boards to implement the CPU and its memory, the Nova 2 fitted all of this onto a single board.
On Ensoniq sound boards, the controller provided several advantages compared to competitors without a CPU on board.
* CPU registers are more expensive than external memory locations ; large register sets were cumbersome with limited circuit boards or chip integration.
Their main differences were the CPU, RAM, and Weitek Floating Point Accelerator boards, disk controllers and disk drives ( both ST-506 and SMD were available ).
* German electronics manufacturer Eltec has been manufacturing the Eurocom-model CPU boards for industrial purposes since the late seventies, starting with the 6802 and 6809 Eurocom-1 and Eurocom-2, and onwards with 68K, and derivative, CPU boards up to today.
The resulting CPU was operational by the summer of 1980 and was implemented using Motorola MECL-10K technology on large wire wrapped custom boards.
To demonstrate the concept, Max Loesel and Sven Rau developed three prototype boards: ( 1 ) a 68000 CPU board ; ( 2 ) a dynamic memory board ; ( 3 ) a static memory board.
The chips were mostly used as upgrades by end users looking to improve performance of an aging 386 and especially by dealers, who by changing the CPU could turn slow-selling 386 boards into budget 486 boards.
The onboard power regulation circuitry, partly visible near the bottom of the photo, allows the CPU to operate on boards that provide only 5 volts to the CPU.
The first Novell product was a proprietary hardware server based on Motorola 6800 CPU supporting 6 MUX ports per board for a maximum of 4 boards per server using a star topology with twisted pair cabling.
CPU and may
An accumulator machine, also called a 1-operand machine, or a CPU with accumulator-based architecture, is a kind of CPU where, although it may have several registers, the CPU mostly stores the results of calculations in one special register, typically called " the accumulator ".
For a genome as large as the human genome, it may take many days of CPU time on large-memory, multiprocessor computers to assemble the fragments, and the resulting assembly will usually contain numerous gaps that have to be filled in later.
If the addition operation produces a result too large for the CPU to handle, an arithmetic overflow flag in a flags register may also be set.
Software includes all the various forms and roles that digitally stored data may have and play in a computer ( or similar system ), regardless of whether the data is used as code for a CPU, or other interpreter, or whether it represents other kinds of information.
On some processors the control unit may be further broken down into other units, such as a scheduling unit to handle scheduling and a retirement unit to deal with results coming from the pipeline ; It is the main function of CPU.
* Dhrystone's small code size may fit in the instruction cache of a modern CPU, so that instruction fetch performance is not rigorously tested.
When either writing through or directly to physical device registers, this may, but not necessarily, cause a real interrupt to occur at the device's central processor unit ( CPU ), if it has one.
On recent motherboards, the BIOS may also patch the central processor microcode if the BIOS detects that the installed CPU is one in for which errata has been published.
This may be interesting in cases where the egress router has lots of packets leaving MPLS tunnels, and thus spends inordinate amounts of CPU time on this.
CPU instruction rates are different from clock frequencies, usually reported in Hz, as each instruction may require several clock cycles to complete or may be capable of executing multiple independent instructions at once.
They will generally have the ability to retain functionality while waiting for an event such as a button press or other interrupt ; power consumption while sleeping ( CPU clock and most peripherals off ) may be just nanowatts, making many of them well suited for long lasting battery applications.
Micro-controllers may not implement an external address or data bus as they integrate RAM and non-volatile memory on the same chip as the CPU.
Alternately, Paula may signal the CPU to load a new sample into any of the four audio output buffers by generating an interrupt when a new sample is needed.
One language may occupy the greater number of programmer hours, a different one have more lines of code, and a third utilize the most CPU time.
If there is sufficient commercial interest, a hardware implementation of the CPU specification may be built ( e. g., the Pascal MicroEngine or a version of the Java processor ).
Some of the functions may be performed through an application-specific integrated circuit ( ASIC ) to avoid overhead caused by multiple CPU cycles, and others may have to be performed through the CPU as these packets need special attention that cannot be handled by an ASIC.
Such mechanisms involve system calls, and usually invoke the OS's dispatcher code on exit, so they typically take hundreds of CPU instructions to execute, while masking interrupts may take as few as one instruction on some processors.
0.882 seconds.