The Intel MCS-51 ( commonly referred to as 8051 ) is a Harvard architecture, single chip microcontroller ( µC ) series which was developed by Intel in 1980 for use in embedded systems .< ref > John Wharton: An Introduction to the Intel MCS-51 < sup > TM </ sup > Single-Chip Microcomputer Family, Application Note AP-69, May 1980, Intel Corporation .</ ref >< ref > John Wharton: Using the Intel MCS-51 < sup > TM </ sup > Boolean Processing Capabilities, Application Note AP-70, May 1980, Intel Corporation .</ ref > Intel's original versions were popular in the 1980s and early 1990s.

Many variants of the 8051 include the standard 256 bytes of IRAM plus a few KB of XRAM on the chip.

The most common variants are LH 2. 2, which uses an Intel 8049 ( MCS-48 ) microcontroller, and usually a 4 kB programme memory, and LH 2. 4, which uses a Siemens 80535 microcontroller ( a variant of Intel's 8051 / MCS-51 architecture ) and 32 kB programme memory based on the 27C256 chip.

With a 12 MHz clock frequency, the 8051 could thus execute 1 million one-cycle instructions per second or 500, 000 two-cycle instructions per second.

One particularly useful feature of the 8051 core was the inclusion of a boolean processing engine which allows bit-level boolean logic operations to be carried out directly and efficiently on select internal registers and select RAM locations.

Several C compilers are available for the 8051, most of which feature extensions that allow the programmer to specify where each variable should be stored in its six types of memory, and provide access to 8051 specific hardware features such as the multiple register banks and bit manipulation instructions.

Because IRAM, XRAM, and PMEM ( read only ) all have an address 0, C compilers for the 8051 architecture provide compiler-specific pragmas or other extensions to indicate where a particular piece of data should be stored ( i. e. constants in PMEM or variables needing fast access in IRAM ).

The 8052 and 8032 are largely considered to be obsolete because these features and more are included in nearly all modern 8051 based microcontrollers.

The 8031 was a cut down version of the original Intel 8051 that did not contain any internal program memory ( ROM ).

A vendor might sell an 8051 as an 8031 for any number of reasons, such as faulty code in the 8051's ROM, or simply an oversupply of 8051's and undersupply of 8031's.

Features of the modern 8051 include built-in reset timers with brown-out detection, on-chip oscillators, self-programmable Flash ROM program memory, built-in external RAM, extra internal program storage, bootloader code in ROM, EEPROM non-volatile data storage, I²C, SPI, and USB host interfaces, CAN or LIN bus, PWM generators, analog comparators, A / D and D / A converters, RTCs, extra counters and timers, in-circuit debugging facilities, more interrupt sources, and extra power saving modes.

Because the 8051 is an accumulator-based architecture, all arithmetic operations must use the accumulator, e. g. ADD A, 020h will add the value in memory location 0x20 in the internal RAM to the accumulator.

The 8052 was an enhanced version of the original 8051 that featured 256 bytes of internal RAM instead of 128 bytes, 8 KB of ROM instead of 4 KB, and a third 16-bit timer.

The 8051 architecture provides many functions ( CPU, RAM, ROM, I / O, interrupt logic, timer, etc.

The 8051 microcontroller has two, a primary accumulator and a secondary accumulator, where the second is used by instructions only when multiplying ( MUL AB ) or dividing ( DIV AB ); the former splits the 16-bit result between the two 8-bit accumulators, whereas the latter stores the quotient on the primary accumulator A and the remainder in the secondary accumulator B.

The embedded CPU family with the largest number of total units shipped is the 8051, averaging nearly a billion units per year.

The 8051 is widely used because it is very inexpensive.

The silicon cost of an 8051 is now as low as US $ 0. 001, because some implementations use as few as 2, 200 logic gates and take 0. 0127 square millimeters of silicon.

51-FORTH is an implementation of the Forth programming language for the Intel 8051 microcontroller.

SAB-C515-LN by Infineon is based on the 8051

These registers also allowed the 8051 to quickly perform a context switch which is essential for time sensitive real-time applications.

In many engineering schools the 8051 microcontroller is used in introductory microcontroller courses.

Program memory is read-only, though some variants of the 8051 use on-chip flash memory and provide a method of re-programming the memory in-system or in-application.

The AVR Instruction Set is more orthogonal than those of most eight-bit microcontrollers, in particular the 8051 clones and PIC microcontrollers with which AVR competes today.

97 is a non-trivial factor of 8051.

* Also, a free compiler, Turbo51, is available for producing code for Intel 8051 chips.

The card is based on an 8051 processor with 3DES / AES crypto accelerator, making very fast transactions possible.

The 8-bit Intel 8080 ( as well as the 8085 and 8051 ) microprocessor was basically a slightly extended accumulator-based design and therefore not orthogonal.

Historically almost all early computers were accumulator machines ; and many microcontrollers still popular as of 2010 ( such as the 68HC12, the PICmicro, the 8051 and several others ) are basically accumulator machines.

Many microcontrollers are so quirky that they effectively require their own non-standard dialects of C, such as SDCC for the 8051, which prevent using standard tools ( such as code libraries or static analysis tools ) even for code unrelated to hardware features.

A long but still not exhaustive list of common architectures are: 65816, 65C02, 68HC08, 68HC11, 68k, 78K0R / 78K0, 8051, ARM, AVR, AVR32, Blackfin, C167, Coldfire, COP8, Cortus APS3, eZ8, eZ80, FR-V, H8, HT48, M16C, M32C, MIPS, MSP430, PIC, PowerPC, R8C, RL78, SHARC, SPARC, ST6, SuperH, TLCS-47, TLCS-870, TLCS-900, TriCore, V850, x86, XE8000, Z80, AsAP and others.

With a single instruction the 8051 can switch register banks as opposed to the time consuming task of transferring the critical registers to the stack or designated RAM locations.

The original 8051 core ran at 12 clock cycles per machine cycle, with most instructions executing in one or two machine cycles.

Enhanced 8051 cores are now commonly used which run at six, four, two, or even one clock per machine cycle, and have clock frequencies of up to 100 MHz, and are thus capable of an even greater number of instructions per second.

There are various high-level programming language compilers for the 8051.

Based on a newer, slightly more flexible, version of the Asters original Motorola MC6845 video chip, the Rockwell 6545, it worked by adding a new video mode, one with the ability to reprogram an extended, ( 2048 characters instead of 256 characters ) version of the character set, supported by an extended character memory of the video card that did not use one ( 8 bit ) byte per character, but an 11 bit " word ", so it could address each one of the available 2048 unique programmable characters.

To ensure software developers had an economical means of producing better sound than TIA, GCC had originally planned to make a low-cost, high performance sound chip, GUMBY, which could also be placed in 7800 cartridges to enhance its sound capabilities further.

For example, a 133 MHz 6x86 will outperform a P5 Pentium at 166 MHz, and as a result Cyrix could market the 133 MHz chip as being a P5 Pentium 166's equal.

Reading Atari 8-bit 130kB or 180kB disks was possible as well with special software, but the standard Atari 8-bit 90kB format, which used FM rather than MFM encoding, could not be handled by the 1571 hardware without modifying the drive circuitry as the control line that determines if FM or MFM encoding is used by the disc controller chip was permanently wired to ground ( MFM mode ) rather than being under software control.

* Cyrix Cx486SLC / Cx486DLC could be ( simplistically ) described as a kind of 386 / 486 hybrid chip that included a small amount of on-chip cache.

In the early days of integrated circuits, only a few transistors could be placed on a chip, as the scale used was large because of the contemporary technology, and manufacturing yields were low by today's standards.

Over time, millions, and today billions, of transistors could be placed on one chip, and to make a good design became a task to be planned thoroughly.

It even offered, via an additional AY-3-8910 sound chip inside the ECS module and an optional 49-key Music Synthesizer keyboard, the possibility of turning the Intellivision into a multi-voice synthesizer which could be used to play or learn music.

The 1MB machine ( 128k of ROM, 128k of video RAM, 768k of system RAM ) promised graphics with 256 colours on-screen simultaneously, could handle 3 million pixels per second, output 8 channel stereo and had a blitter chip that allowed vertical and horizontal hardware scrolling.

These elements could often be brought together as a single chip.

This chip resembled the 68HC000 in most respects, but its data bus could operate in either 16-bit or 8-bit mode, depending on the value of an input pin at reset.

The 68040 offered the same features as the Intel 80486, but on a clock-for-clock basis could significantly outperform the Intel chip.

An " instance " could be anything from a MOSFET transistor or a bipolar transistor, to a resistor, capacitor, or integrated circuit chip.

From this we learn that, although Pius's defenders still say that he paid a golden ransom in a vain effort to save Rome's Jews from transportation to the death camps, the most he did was indicate a willingness to chip in if the Jews could not raise the sum demanded.

The LSI-11 ( PDP-11 / 03 ), introduced in February, 1975 was the first PDP-11 model produced using large-scale integration ; the entire CPU was contained on four LSI chips made by Western Digital ( the MCP-1600 chip set ; a fifth chip could be added to extend the instruction set, as pictured on the right ).

Additional registers would require sizeable chip or board areas which, at the time ( 1975 ), could be made available if the complexity of the CPU logic was reduced.

The SysRq key was added so that multiple operating systems could be run on the same computer, making use of the capabilities of the 286 chip in the PC / AT.

The SL and TL were also shipped with MS-DOS 3. 3 and DeskMate 3 in ROM, and featured an EEPROM memory chip to store BIOS settings ( which enabled similar functionality to today's CMOS NVRAMs, so that startup options could be saved ).

Depending on and after the doubling time used in the calculations, this could mean up to a hundredfold increase in transistor count per chip within a decade.

* Communications software directly accessed the UART serial port chip, because the MS-DOS API and the BIOS did not provide full support and was too slow to keep up with hardware which could transfer data at 19200 bit / s.

In 1978, George Perlegos at Intel developed the Intel 2816, which was built on earlier EPROM technology, but used a thin gate oxide layer so that the chip could erase its own bits without requiring a UV source.

For example, Epson embeds a chip which prevents printing when the chip claims the cartridge is empty, although a researcher who over-rode the system found that in one case he could print up to 38 % more good quality pages, even though the chip stated that the cartridge was empty.